A static random access memory (SRAM) cell can consist of four N-channel transistors and two high value pull-up resistors, also referred to as load resistors. In the prior polysilicon (for example, approximately three microns long) defined as part of a second polysilicon layer formed on, but separated by insulation from at least part of, a first doped polysilicon layer. The portions of the second polysilicon layer adjacent to the undoped length are implanted with arsenic or phosphorous to lower their resistances to 100-200 ohms per square. However, subsequent heat treatments cause the dopants to diffuse laterally into the undoped polysilicon load resistor thereby reducing its effective length. This causes its resistance to drop and the cell current to increase significantly. Alternatively, another type of polysilicon resistor involves the deposition of polysilicon directly onto the doped silicon substrate. Depending on the nature of the grain boundaries of the polysilicon, the dopant in the silicon substrate can diffuse rapidly through the polysilicon resistor, rendering it useless as a high value pull-up resistor.
In the prior art, the problem of resistor failure caused by dopant diffusion has been overcome by making polysilicon load resistors excessively long. As much as one micron on either end of the undoped three micron long portion of the polysilicon is allowed for the lateral diffusion of dopants, leaving approximately one micron or less of intrinsic undoped silicon in the middle that ultimately acts as a high resistance resistor on the order of many giga-ohms. In conventional static random access memory processes, the three micron load resistor length has put a severe limitation on cell size reduction.